(1) Field of the Invention
This invention relates to a data transfer apparatus for transferring data between a plurality of disk apparatuses and a main memory.
(2) Description of the Related Art
Recently, the video on demand system and the video server system have been developed for commercial use in which image data is distributed on request to a plurality of users. In these systems, data transfer apparatuses are used for transferring image data from a plurality of disk apparatuses to a buffer memory at high speed.
The data transfer apparatuses sequentially read image data from the plurality of disk apparatuses in sequence in accordance with user requests and transfer the read image data to the buffer memory.
FIG. 1 is a block diagram showing the construction of a conventional data transfer apparatus included in a video server. The data transfer apparatus reads image data from a plurality of disk apparatuses in sequence in accordance with user requests and transfers the read image data to a main memory (a buffer memory for storing image data) so that the image data is distributed to users. The conventional data transfer apparatus is composed of magnetic disk apparatuses 22a, 22b, and 22c, disk access unit 23, processor 24, and main memory 25.
Magnetic disk apparatuses 22a, 22b, and 22c, connected to an SCSI (Small Computer System Interface) bus, store compressed image data of movies and the like. Each magnetic disk apparatus includes an internal buffer (a disk cache) for temporarily storing data to be read/written. Magnetic disk apparatuses read/write data via the SCSI bus after they obtain the right for using the SCSI bus.
The magnetic disk apparatuses have the disconnect function and the reconnect function. The disconnect function is used to temporarily free the bus for use for another disk apparatus when a head seek occurs or when the internal buffer becomes empty of data during reading/writing data. When this happens, the magnetic disk apparatus issue a disconnect interrupt request to processor 24 via disk access unit 23. The reconnect function is used to obtain the bus use right when a certain amount of data is stored in the internal buffer after the disconnection.
Disk access unit 23 controls reading/writing data from/to magnetic disk apparatuses 22a, 22b, and 22c (disk access control) and directly transfers data between main memory 25 and each of the magnetic disk apparatuses 22a, 22b, and 22c (DMA (Direct Memory Access) control).
Concerning the disk access control, disk access unit 23, after receiving a command for reading/writing data from/to a magnetic disk apparatus (hereinafter the command is called the disk command), passes through three phases to use the SCSI bus in data transfer: bus free phase in which the SCSI bus is free; arbitration phase in which obtainment of the bus use right is attempted; and selection phase or transfer phase in which the SCSI bus can be used.
Concerning the DMA control, disk access unit 23 reads DMA commands sequentially from a DMA command table which is created by processor 24 in main memory 25, then in accordance with the read DMA commands, transfers data from the magnetic disk apparatus directly to the data area in main memory 25. This method is called the DMA chain command method.
FIG. 2 shows a DMA command table. As shown in the drawing, the DMA command table is composed of an array of the DMA commands which are each composed of an address (starting address) of the data area and a size of data to be transferred to a location in the data area specified by the address, the address and the data size each having four bytes in length. In case the main memory is used for a virtual storage, the data size in the DMA command is specified not to exceed the size of one page (e.g., 4 KB) of the virtual storage. As a result, the DMA command table is required to include a lot of DMA commands when a large amount of image data (hundreds of kilo bytes to several mega bytes) is read at once by a video server or the like. Furthermore, the size of the DMA command table itself should not exceed the size of one page. That means the data size specified in one DMA command table has a limit, the data size being equal to a size obtained by totaling all the data sizes specified in the DMA commands of the table.
Processor 24 executes a program stored in main memory 25. More specifically, processor 24 generates the DMA command table, issued the disk commands, issues DMA enable instructions, and performs interrupt process requested from disk access unit 23. With these operations, processor 24 instructs disk access unit 23 to read image data requested by a user by reading a certain amount of image data (for example, an amount of image data corresponding to the images reproduced in one second) from each disk apparatus at a time and to store the read image data into main memory 25.
Processor 24 receives interrupt requests mainly for two kinds of interrupt requests, namely, a disconnect interrupt request and a table update interrupt request.
The table update interrupt request is generally issued when, during a data transfer, the DMA command table becomes empty of DMA command to be executed. That is, the table update interrupt request is issued when data is transferred according to the last DMA command of the DMA command table when the data size specified in the disk command is greater than the data size specified in the DMA command table. For example, if the DMA command table specifies 512 KB of main memory area and the disk command specifies 1 MB of data to be read, the table update interrupt request is issued when the 512 KB of data has been transferred. Processor 24, on receiving the table update interrupt request, updates the DMA command table.
The disconnect interrupt request is issued when an HDD disconnects from the bus. The processor 24, on receiving the disconnect interrupt request, preserves the current state and calculates the rest of the amount of data to be transferred, then, in accordance with this calculation result, changes the addresses and the data sizes specified in the DMA commands. This process performed by processor 4 in preparation for the reconnection is called "repair process" in the present document.
FIG. 3 shows SCSI bus occupation timing and interrupt processing timing of processor 4.
As shown in the drawing, the bus connection timing axis includes solid lines and dashed lines. The solid lines indicate the periods during which the magnetic disk apparatus holds the bus use right; the dashed lines indicates the periods during which the bus is freed. The symbol "R" indicates the reconnection timing or the connection timing (in case of the first obtainment of the bus use right); symbol "D" indicates the disconnection timing.
With regard to the interrupt process axis, the symbol "d" indicates a period during which a disconnect interrupt is processed; and the symbol "c" indicates a period during which a table update interrupt is processed. As in apparent from the drawing, disk access unit 23 keeps the bus use right while processor 24 updates the DMA command table and resumes the data transfer after the table update. Processor 24 performs the repair process when it processes the disconnect interrupt. The bus is freed after the disconnect interrupt is processed and is used by a magnetic disk apparatus by a reconnection or a disk command issued by the processor.
FIG. 4 shows the change of state in one magnetic disk apparatus when the magnetic disk apparatus receives the disk command and transfers the data with the size specified in the disk command.
As shown in FIG. 4, on receiving the disk command from processor 24 (S41: COMMAND ISSUANCE) when the bus is free, disk access unit 23 refers to the DMA command table and starts transferring data between the magnetic disk apparatus and the memory (S42). During the data transfer, the DMA command table is update by an interrupted (I41: DMA COMMAND TABLE UPDATE INTERRUPT) each time the table becomes empty of the DMA command to be executed. The magnetic disk apparatus disconnects from the bus when the internal buffer becomes empty (S43: DISCONNECTION); the magnetic disk apparatus reconnects to the bus when the internal buffer becomes full or when a certain amount of data is stored in the internal buffer (S44: RECONNECTION); and disk access unit 23 resumes the data transfer (S42: DATA TRANSFER). This process is repeated during the data transfer. When the data with the size specified in the disk command has been transferred, execution of the disk command ends (S45), and an interrupt request (I43: COMMAND END INTERRUPT) for notifying the end of the command execution is issued.
In this way, a data transfer is performed in accordance with a disk command issued to a magnetic disk apparatus. As shown in FIG. 1. The disk commands are issued to three magnetic disk apparatuses 22a, 22b, and 22c in sequence. As a result, when on magnetic disk apparatus disconnects from the bus, another one reconnects to the bus.
However, the above conventional data transfer apparatus has a problem that the throughput of data transfer does not improve due to the processing overhead generated in the processor.
The reasons why the overhead is incurred are as follows. Firstly, the table update interrupt requests and the disconnect interrupt requests are frequently issued. While such on interrupt is processed, the data transfer substantially stops. Secondly, when the bus becomes to be free by a disconnection, the processor repeatedly attempts to obtain the bus use right to issue a new disk command. When this happens, the processor cannot proceed to process for the next data transfer, such as generating the DMA command table, generating the disk command, and generating the DMA enable instruction. In the attempt to obtain the bus use right, the processor checks to see if the bus is free via the disk access unit and instructs the disk access unit to obtain the bus use right through the arbitration phase.